Enjoy For Free Verilog By Example: A Concise Introduction For FPGA Design Written By Blaine Readler Released Through Printable Format

introduction. Readable, useful, interesting and brief, this book is a great starting point for learning Verilog, The authors sense of humor is apparent on occasion as well, making the book that much more enjoyable, It's as concise a primer as it claims, which is exactly what I was looking for, There are only one minor thing I'd change:

Improve the typography, I don't mean "use nicer fonts," since the fonts are fine asis, What I mean "typeset code in a code font within body text, " The author or typesetter just keeps code in the text in the regular text font, only sometimes surrounding it with quotes, It'd be more readable if Verilog code and constructs were always in a monospace font distinct from body text, This is a good book for picking up on the syntax of Verilog, It does a good job of explaining the nuts and bolts of the language, It does not, however, delve into the underlying reasons for why a particular design is implemented in a particular way, That is left for other books on digital design, I found it interesting, but it left me hoping to read a more in depth book in the near future, A practical primer for the

student and practicing engineer already familiar with the basics of digital design, the reference develops a working grasp of the verilog hardware description language stepbystep using easytounderstand examples.
Starting with a simple but workable design sample, increasingly more complex fundamentals of the language are introduced until all major features of verilog are brought to light, Included in the coverage are state machines, modular design, FPGAbased memories, clock management, specialized I/O, and an introduction to techniques of simulation, The goal is to prepare the reader to design realworld FPGA solutions, All the sample code used in the book is available online, What Strunk and White did for the English language with "The Elements of Style," VERILOG BY EXAMPLE does for FPGA design, .